1. Field of Invention
The present invention generally relates to a sense amplifier, and more particularly to a small-offset voltage-mode sense amplifier.
2. Description of Prior Art
In recently years, a memory with lower operation power, high operation speed, and high storage density is needed for using in mobile devices, medical electrical equipment, and portable storage devices, etc.
By using a power source with low voltage level, a larger read margin is necessary for against process, voltage and temperature (PVT) variation. In conventional art, a data read scheme of a sense amplifier is suffered from slow margin developing. Such as that, a longer read access time is needed for the sense amplifier.
Referring to FIG. 1A and FIG. 1B, FIGS. 1A and 1B illustrate waveform diagrams of bit line voltages for a memory cell during a data reading operation with standard power voltage and a low power voltage, respectively. Voltages on bit lines BL1 and BL2 are compared for sensing out data stored in a memory cell, wherein the bit line BL1 is corresponding to stored data “1”, and the bit line BL2 is corresponding to stored data “0”. In FIG. 1A, at a time point T1, a voltage difference dV1 is large enough for sensing out the stored in the memory cell, and the data reading operation can be completed at the time point T1. On the other hand, in FIG. 1B, a voltage difference dV2 is large enough for sensing out the stored in the memory cell till a time point T2, and the data reading operation can be completed with a longer time period when the memory is operated in a lower power voltage.